The present invention generally relates to wafer fabrication, and more specifically, to wafer fabrication operations that include the formation of inverse T-shaped source or drain contact structures having air gap spacers.
In contemporary semiconductor device fabrication processes, a large number of semiconductor devices, such as field effect transistors (FETs), are fabricated on a single wafer. Some non-planar transistor device architectures, such as fin-type field effect transistors (FinFETs), employ semiconductor fins and a gate structure wrapped around the sidewalls and top of a central portion of the fin. The portion of the fin that is under the gate structure functions as the channel, and the portions of the fin that are not under the gate structure function as the source and the drain regions. When a sufficient voltage is applied to the gate, the channel becomes conductive and allows current to flow from the source, through the channel to the drain. This current flow is in a direction that is substantially parallel to a major surface of a substrate on which the FinFET device is formed. In some FinFET configurations, raised source/drain (S/D) regions are epitaxially grown over the S/D portions of the fin to increase the S/D volume and provide a larger surface for forming the necessary S/D conductive contacts for the FinFET.